Technologies & Trends
Patent & Technology Trend Analysis — track patent activity, technology roadmaps, emerging technologies, and report-linked semiconductor trend signals.
Patent Activity by Technology Area
Directional patent activity signals across priority technology areas, linked to subscription reports.
| Technology area | Patent activity signal | Key assignees | Linked reports | Last reviewed |
|---|---|---|---|---|
| Hybrid bonding | Increasing | TSMC, Intel, Samsung, Besi | 6 reports | May 2026 |
| Glass substrates | Emerging | Intel, Absolics, Corning | 4 reports | May 2026 |
| HBM packaging | High | SK hynix, Samsung, Micron | 5 reports | May 2026 |
| EUV materials | High | JSR, TOK, Shin-Etsu, DuPont | 4 reports | Apr 2026 |
| Co-packaged optics | Increasing | Broadcom, Intel, Marvell, Cisco | 5 reports | Apr 2026 |
Methodology: Patent analysis is provided as a directional intelligence layer within relevant reports, using patent publication activity, assignee concentration, technology keywords, and analyst review to identify emerging technology trends. It does not include patent claim-level analysis, legal validity opinions, freedom-to-operate analysis, litigation risk scoring, or patent valuation.
Patent Trend Cards
11 of 11 trends shown · Each card links to underlying reports.
Hybrid Bonding
Direct copper-to-copper bonding at <10µm pitch enabling chiplet integration.
Glass Substrates
Glass core substrates replacing organic substrates for AI accelerators.
Chiplet Packaging
Modular die integration using UCIe and BoW interconnects.
HBM Packaging
HBM3E and HBM4 stacks for AI accelerators.
EUV Materials
Photoresists and pellicles for high-NA EUV.
Co-Packaged Optics
Optical I/O integrated with switch ASICs for AI fabrics.
Silicon Photonics
Optical interconnect for short-reach data center links.
GaN Power Devices
Wide bandgap power transistors for fast switching.
SiC Power Modules
Silicon carbide modules for EV traction inverters.
Advanced Metrology
High-NA EUV and 3D structure measurement.
AI Accelerator Architectures
Datacenter GPUs and custom ASICs scaling to multi-die packages.